CUDA error: invalid configuration argument awq_gemm_kernel grid block dimensions exceed SM limit

The AWQ GEMM kernel was launched with a grid or block configuration the device rejects. AWQ kernels assume shapes divisible by their tile size; an unusual hidden dimension or a batch of 1 can produce a degenerate launch. This entry explains how to confirm the cause, apply the fix, and separate it from adjacent quantization failures.

Symptom

CUDA error: invalid configuration argument awq_gemm_kernel grid block dimensions exceed SM limit

Root cause

The AWQ GEMM kernel was launched with a grid or block configuration the device rejects. AWQ kernels assume shapes divisible by their tile size; an unusual hidden dimension or a batch of 1 can produce a degenerate launch. The decisive evidence is the first log line that precedes "CUDA error: invalid configuration argument awq_gemm_kernel grid block dimensions exceed SM limit" and differs from a healthy run.

Recommended fix

check the shapes in the message against the kernel's tile constraints. AWQ typically requires the K and N dimensions to be multiples of the group size (commonly 128).

How Denpex helps

Denpex investigates CUDA error: invalid configuration argument awq_gemm_kernel grid block dimensions exceed SM limit using the evidence you provide or your connected workload collects. Earlier rank, host or application evidence is needed to distinguish an initiating failure from a downstream report.

The literal signature is "CUDA error: invalid configuration argument awq_gemm_kernel grid block dimensions exceed SM limit". It is a environment failure associated with AWQ, GPTQ, bitsandbytes, GGUF, and torchao. The line identifies the failing operation or subsystem, while the surrounding evidence decides whether it is the initiating fault or a downstream symptom.

The AWQ GEMM kernel was launched with a grid or block configuration the device rejects. AWQ kernels assume shapes divisible by their tile size; an unusual hidden dimension or a batch of 1 can produce a degenerate launch. The failure becomes visible at this call site because the operation first requires the missing resource, valid state, healthy peer, or correct result. Earlier log lines and a known-good control carry more causal value than the final wrapper exception.

• The workload stops or loses forward progress after emitting "CUDA error: invalid configuration argument awq_gemm_kernel grid block dimensions exceed SM limit".
• A retry on the same configuration reproduces the failure because the causal state has not changed.
• The outer framework exception can hide the rank, node, allocation, or dependency that failed first.
• Increasing timeouts or reducing workload size can suppress the symptom without correcting the cause.

• AWQ, GPTQ, bitsandbytes, GGUF, and torchao
• production-shaped multi-accelerator workloads
• containerized and bare-metal deployments of the same stack

Use this checklist to test the hypothesis against a small reproduction. No single line proves the root cause, so preserve the preceding events and compare one variable at a time.

• ✓Find the first occurrence of "CUDA error: invalid configuration argument awq_gemm_kernel grid block dimensions exceed SM limit" and preserve at least 100 lines before it.
• ✓Identify which rank, node, device, or process emitted the first related warning.
• ✓M=1 (single-token decode) hits a different kernel path than batched prefill and is where this usually appears. Confirm whether it reproduces only at batch size 1.
• ✓Repeat the same input after the targeted change and require the signature to disappear.
• ✓Resume from no checkpoint action; serving-side fault only after the control passes.

• The AWQ GEMM kernel was launched with a grid or block configuration the device rejects. AWQ kernels assume shapes divisible by their tile size; an unusual hidden dimension or a batch of 1 can produce a degenerate launch.
• The decisive evidence is the first log line that precedes "CUDA error: invalid configuration argument awq_gemm_kernel grid block dimensions exceed SM limit" and differs from a healthy run.
• A nearby failure remains a competing hypothesis until a control separates configuration, capacity, transport, and hardware causes.

CUDA error: invalid configuration argument awq_gemm_kernel grid block dimensions exceed SM limit

Use this text as a lookup key in logs and upstream issue trackers. It is not presented as a captured customer log. Confirm the cause from your own preceding events, versions, configuration and the cited references.

check the shapes in the message against the kernel's tile constraints. AWQ typically requires the K and N dimensions to be multiples of the group size (commonly 128). This changes the condition in the causal diagnosis instead of hiding the outer exception. The repeated control proves ownership before recovery from no checkpoint action; serving-side fault.

# Preserve evidence before restarting
rg -n -i 'error|exception|timeout|failed' <log-file>
nvidia-smi
python -m torch.utils.collect_env

# Find the exact signature in the complete log
rg -n -F -- "CUDA error: invalid configuration argument awq_gemm_kernel grid block dimensions exceed SM limit" <log-file>

Adapt the snippet to your framework. The same pattern holds for PyTorch Lightning, Hugging Face Trainer, DeepSpeed, Megatron-LM, and vLLM training wrappers. Where the wrapper exposes a config flag (for examplelr_scheduler_type in Trainer), prefer the flag over the imperative API to keep the schedule declarative and reproducible.

Select the traceback or open the failed terminal, then run Denpex locally to see the initiating rank, collateral failures, exact fix, and verification command without uploading the log.

CUDA reports errors asynchronously, so the traceback usually points at whatever line synchronised next rather than the one at fault. The hub covers every common CUDA error and how to make it report honestly.